Logo
RECHERCHER

Multi-FPGA communication interface for electric circuit co-simulation

Téléchargements

Téléchargements par mois depuis la dernière année

Plus de statistiques...

Lemaire, M., Massicotte, D. et Bélanger, J. (2020, November 9-10). Multi-FPGA communication interface for electric circuit co-simulation. Dans 2020 IEEE Electric Power and Energy Conference (EPEC), Edmonton, Canada.

[thumbnail of MASSICOTTE_D_14_POST.pdf]
Prévisualisation
PDF
Télécharger (431kB) | Prévisualisation

Résumé

Real-time simulation of electric circuit is most often used to test real components connected to a real-time simulator. The increasing size and complexity of the simulation as well as the demand for better accuracy, lower time step, have pushed these simulations onto new hardware. For already more than a decade FPGA simulation is used by real-time simulation companies around the world to effectively simulate circuits under the μs. With the computation requirement growth, multi-FPGA simulation needs to be considered as a valuable asset but attention must be given to the latency between the simulations for accuracy and stability. In order to minimize the communication latency, a custom interface and communication architecture for co-FPGA simulation is proposed. This paper presents detailed work on this architecture and shows promising results.

Type de document: Document issu d'une conférence ou d'un atelier
Mots-clés libres: Communication inter-FPGA Real-time simulator Low time-step Low latency
Date de dépôt: 09 mai 2022 17:51
Dernière modification: 09 mai 2022 17:51
URI: https://depot-e.uqtr.ca/id/eprint/10131

Actions (administrateurs uniquement)

Éditer la notice Éditer la notice